JeeNode Micro v2/v3

The JeeNode Micro is baby brother to the JeeNode, v2 is illustrated here on a 0.2" grid:


Here is the contrast between v2 and v3 - note the reduction in length.

JMv2 v. JMv3

**Note:* because it has less capabilities than the usual ATmega328’s, software development and testing with the JeeNode Micro is more challenging than with a JeeNode/JeeLink.* There is full support in the Arduino IDE, but downloading sketches requires a Flash programmer and there is not a simple way to add a debug console.

Specifications v2/v3

The JeeNode Micro (JNµ) uses an ATtiny84 MPU which has 8 Kb of flash memory, 512 bytes RAM, and 512 bytes EEPROM. The board includes the same RFM12B wireless module as JeeNodes and JeeLinks.

This unit can be programmed using the Arduino IDE, but this requires additional setup (see the Arduino-tiny) project. Also, sketches are loaded via an ISP programmer, not FTDI. There is currently no installed bootloader.

The ATtiny84 supports ratiometric analog inputs, referenced to ground, like the ATmega328 used on JeeNodes. In addition there is support for differential inputs with a switchable 20x amplifier. This allows measurements of much smaller voltages, even with a positive offset from ground.

There is a single 9-pin header. A subset of the pins is compatible with a standard port, suitable for connecting the same plugs as used on other JeeNodes.

The design pays special attention to flexibility of sourcing power, especially using battery power effectively. The direct power version operates over a wide input voltage range without regulation (1.8 .. 5V for the ATtiny, 2.2 .. 3.8 V for the RFM12B). A special power sequencing technique is available to handle a slowly rising supply such as found in supercap/energy harvesting applications.

Specification v2 only

Dimensions (without battery holder): 16 x 48 x 4 mm.

The back of the board has provision for an optional LTC3525 boost regulator (the same chip as on the AA board). When populated and linked into circuit, this provides regulated 3.3V power from input dropping as low as 0.9V (e.g. an almost empty AA cell). The idle mode draws is only 7 .. 30 µA (input voltage dependent). Now the input can range is 1.0 .. 5.0 V, matching 2 or 3 in-series battery packs (even 4, if restricted to NiMh cells). Similarly, a powered USB hub 5.0V or mains plug-in power module will work (caution: double check the supply ‘no load’ voltage stays well below 5.5V).

Safety Hazard — Remove the coin cell if the boost regulator is active

The ISP/SPI lines are presented in the standard 2x3 format.

Specification v3 only

Dimensions (without battery holder): 16 x 43 x 4 mm.

The top layer of the board has provision for an optional LTC3525 boost regulator (the same chip family as on the AA board, different output). When populated and linked into circuit, this provides regulated 3.0V power (yes, 3.0V, see this Weblog discussion of Taking the JNmicro to 3.0V)
This regulated output voltage is derived from an input voltage dropping as low as 0.9V (e.g. an almost empty AA cell). The idle mode current drawn is only 7 .. 30 µA (input voltage dependent). Now the input voltage can range is 1.0 .. 5.0 V. This matches 2 or 3 in-series battery packs (even 4, if restricted to NiMh cells). A powered USB hub 5.0V or mains plug-in power brick will work, but be cautious: **** double check that the supply ‘no load’ voltage stays well below 5.5V.****

Safety Hazard — Remove the coin cell if the boost regulator is active

The ISP/SPI lines are present, but not in the usual 2x3 format. For details, see this Weblog series, also referenced below.

How to Get It

Pre-assembled units and boards are listed in the Shop.
Or create your own boards (see below for schematic PDF and EAGLE files).
Dimensions (without battery holder): V2 16 x 48 x 4 mm. V3 16 x 43 x 4 mm.
Everything is provided as open source, both hardware and software.

How to Build & Use It

The board comes pre-assembled, with the ATtiny84 and other components already soldered on (including the power boost regulator when ordered). You just need to add headers as needed if you are not directly wiring to the pins.

Here is one header layout that works well if you are breadboarding a design. Note that the lower pin in the 6pin female header is removed from the black housing.

Header Layout for Breadboarding

The antenna is required and can be a simple 1/4-wavelength piece of wire soldered at the ANT position:

  • for 433 MHz, use a 165 mm wire
  • for 868 MHz, use a 82 mm wire
  • for 915 MHz, use a 78 mm wire

Power Management v3

There is a new feature in v3 for assisting low energy consumption and coping with the weak power sources seen with energy harvesting applications. From a power up/RESET, a PFET high-side switch in series with the RFM12B module Vdd supply pin enforces the default state of completely powered OFF.

Why add this capability? The RFM12B needs to be switched out of circuit during a board low voltage/slow ramp startup - it has a glitch where a slowly rising Vdd puts it into a current-hungry mode before its own internal reset logic starts up. The MPU may already be active, but since the RFM12B is not yet ready to listen on the SPI bus, it cannot be commanded into a controlled sleep /low quiescent current draw state. This “hungry” mode can steal enough of the available micro-harvested current to completely stall the Vcc ramp up, locking out the entire system.

Referring to the schematic, Q1 is a sensitive, highside P-MOSFET to switch on demand the RFM12B’s Vdd supply . The default state needs to be gate HIGH, PFET OFF. The MPU uses PB0 DI/O to pull the gate to GND when Vcc is higher than the ‘glitch’ range, the PFET then fully turns on, providing Vdd to the RFM12B module.

This solves the ‘glitch’ problem but has a drawback. Note the MOSI, MISO, SCL pins on the ISP header are tied to the SDO, SDI, SCK pins respectively on the RFM12B. The pin drivers for the SPI/ISP functions are commoned in the MPU. This is not ambiguous, since ISP is only active for a Flash operation, initiated when the nRESET line is pulled down.

With the default state of RFM12B OFF (even when starting from an unknown state MPU prior to Flashing) the pins on an unpowered module look like a series resistance + ESD diode drop to ground . This loads down the SPI bus lines, giving the FLASH programmer a difficult time enforcing a clean waveform (e.g. Bus Pirate works fine, other brands can fail).

The solution is to turn ON the RFM12B during the Flash:

  • For v2, temporarily link the Q1 gate to ground, or the RFM12B Vdd direct to the Vcc supply.
  • For v3, turning on Q1 just for the flashing step is automated by using the nRESET signal. When the Flasher asserts nRESET LOW, Q1 turns on via diode D2. After a few mS, the RFM12B completes its startup chores, tri-states some pins, leaving the SPI bus lines floating. Since nSEL is high, it doesn’t interact on the bus during the FLASH process, whatever is speeding past.

Using v3 Power Management

Since the default state is now for the RFM12B module to have its Vdd supply OFF, you need to turn ON before use.

To activate the module, turn ON the PFET by inserting these lines before rf12_initialize:

    bitSet(DDRB, 0);
    bitClear(PORTB, 0);

For lower power consumption, the RFM12B Vdd supply can be turned off again (after a suitable delay to ensure the last transmission request has completed). Note that in the idle state, the rf12 libraries put the module into sleep mode with the Vdd supply ON. This alternative method provides comparable savings by avoiding the energy cost of re-running rf12_initialize when Vdd returns.

Setting up the Tool Chain on Windows

  1. Download the latest WinAVR.
  2. Install the latest WinAVR to a convenient location. For example at C:.
  3. Check that the Arduino IDE is not running.
  4. Locate the existing tool-chain directory. It should be in {ArduinoRootFolder}\hardware\tools.
  5. There should be a single sub-directory there named avr. Rename this to something like avr_old.
  6. Create a new sub-directory named avr.
  7. Move the entire contents of the WinAVR directory (C:) to the newly created avr directory ({ArduinoRootFolder}\hardware\tools\avr).
  8. Check that subdirectory {ArduinoRootFolder}\hardware\tools\avr\etc is present. Create etc if not present.
  9. Copy avrdude.conf from {ArduinoRootFolder}\hardware\tools\avr\bin to {ArduinoRootFolder}\hardware\tools\avr\etc

The Arduino IDE should now run and build sketches. If there are problems, switch back to the original tool-chain by renaming avr to avr_new, then renaming avr_old to avr.

Setting up the Tool Chain on OSX

  1. Download and install a copy of the Arduino IDE 1.5.2
  2. Create a folder called “hardware” inside your IDE’s “sketchbook” folder
  3. Download or – preferably – clone a fresh ide-hardware package from GitHub
  4. Rename it to “jeelabs” and move it inside the “hardware” folder

Loading in Sketches

There is currently no embedded bootstrap available to load in sketches through the usual FTDI mechanism. The alternative ISP method is used. This requires an ISP programmer connected to the ISP header pins, such as the Flash Board or one of the several methods to get the same function from a separate JeeNode.

Note that for v2 only, depending on the programmer output drive levels, the ISP/SPI bus loading from the unpowered RFM12B module can disrupt the programming process. For reliable operation, just for the programming cycle, provide a direct power feed to the RFM12B . A single header pin soldered to the Vdd dimple on the RFM12B module makes it easier to jumper reliably to Vcc (Pin7 JP2 is convenient). This extract of the schematic shows this temporary link is to bridge across the normally OFF P-MOSFET.

For v3, this step is not required - an equivalent action is done just for the flashing step by a circuit between the PFET gate and the ⁊RESET pulse from the ISP programmer.

Do not use Fuse settings (RSTDISBL) that reassign the RESET pin as an additional I/O pin. The default RESET pin action is essential to initiate the ISP process. There is no recovery from this situation since the so-called “high-voltage” serial programming mode is not supported on this board layout.


Some important fixes to the IDE integration contributed by Bob Cochran.

Related Information Sources

Weblog posts:
* 2012-12-02 - Meet the JeeNode Micro v2
* 2011-10-27 - AC current node prototype
* 2012-12-29 - RFM12B startup power consumption
* 2013-03-01 - Taking the JNµ to 3.0 V
* 2013-03-02 - Meet the JeeNode micro
* 2013-03-03 - Programming the JeeNode micro v3
* 2013-03-20 - Programming the JNµ – again
* 2013-03-21 - Programming the JNµ – at last!
* 2013-03-23 - JN Micro v3 reference
* 2013-03-29 - JN Micro start-up power

Other links:
* ATTiny Projects - high-low tech

jn-micro.jpg (17.4 KB) myra, 2012-07-17 13:08

jlpcb-134.pdf (25.8 KB) myra, 2012-07-17 16:09

jlpcb-134.brd (32.6 KB) myra, 2012-07-17 16:09

jlpcb-134.sch (137 KB) myra, 2012-07-17 16:09

jlpcb-134.png (47.9 KB) myra, 2012-07-17 16:09

jlpcb-144.brd - v2 (46.3 KB) jcw, 2012-12-01 17:11

jlpcb-144.pdf - v2 (42 KB) jcw, 2012-12-01 17:11

jlpcb-144.png - v2 (19.3 KB) jcw, 2012-12-01 17:11

jlpcb-144.sch - v2 (120 KB) jcw, 2012-12-01 17:11

JMV2.jpg - JMV2 (39.1 KB) martynj, 2013-01-14 15:49

jlpcb-151.png - v3 (49.8 KB) jcw, 2013-02-26 16:24

jlpcb-151.pdf - v3 (43.2 KB) jcw, 2013-02-26 16:24

jlpcb-151.brd - v3 (43.2 KB) jcw, 2013-02-26 16:24

jlpcb-151.sch - v3 (134 KB) jcw, 2013-02-26 16:24

JMv2_v3_side_by_side_bis.jpg - JMv2 v. JMv3 (55 KB) martynj, 2013-02-27 17:09

JM_header_option.jpg - Header Layout for Breadboarding (167 KB) martynj, 2014-01-22 07:41