Let's take the bus
JC, the formatting of this post is a bit weird. Seems as if the code tags went wrong?
RE: Let's take the bus - Added by jcw about 4 years ago
Whoops, fixed. Was caused by editing in WordPress (I normally make changes locally and then send the post to WP).
RE: Let's take the bus - Added by martynj about 4 years ago
The fine detail on the ‘scope shot shows an interesting effect. The tiny ’tick’ marks correspond to interaction between the SCL and SDA signals. Since these two signals follow close, roughly parallel paths from Master to Slave, there is significant parasitic capacitance between the signal lines. And don’t forget the commoned return path of the signal - this flows down the ‘GND’ connection back to the source. Since this is a single path shared between SCL return and SDA return with finite impedance (L and R), this makes the local ground reference ‘bounce’ in sympathy with the transition.
The combined effect is that fast edges on one signal couple across to the other signal since fast transitions contain very high frequency components which pass right through even a small capacitance value (a handful of pF is enough). The ‘shock’ is seen as low level damped ringing. That is why the ‘tick’ is both above and below the quasi-steady state value.
In this case, completely harmless and actually useful to see where the SDA sampling will happen on the falling edge of SCL.
This can be a problem on ‘long’ (e.g. going off-board more than a few cm) connection paths - a technique to reduce the effect is to use ribbon cable for the interconnection and sequence the pins like this (there is no published standard):
| Vcc | SDA | GND | SCL |
This inserts the ground path between the two signal lines which ~ halves the parasitic capacitance between them (and this pin sequence has the advantage that reversing the connector is harmless).